发明名称 Universal computer comprises dual core machine with two cores, and another dual core computer is provided, which has two cores, which works on common data transfer bus and address bus
摘要 <p>The universal computer (1) comprises a dual core computer (1.1a) with core1 and core2, and another dual core computer (1.1b) is provided, which has Core3 and Core4, which works on a common data transfer bus (22) and address bus. A bus controller (25) is provided, which has a bus clock change-over switch (19) arranged between the two dual core computers and the buses. The bus clock change-over switch works with an integrated turn-on time delay and controls two bus drivers.</p>
申请公布号 DE102008016119(A1) 申请公布日期 2009.10.01
申请号 DE20081016119 申请日期 2008.03.19
申请人 TEVKUER, TALIP 发明人 TEVKUER, TALIP
分类号 G06F9/28;G06F1/10;G06F9/22;G06F15/76 主分类号 G06F9/28
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