发明名称 CONTROLLED EDGE THICKNESS IN A SILICON WAFER
摘要 <p>An epitaxial silicon wafer is provided with a thickness in the area adjacent the edge that is greater or less than the thickness adjacent the center. The wafer may be manufactured by a method wherein one or more process parameters are adjusted during deposition of epitaxial layer to control the edge thickness.</p>
申请公布号 SG155116(A1) 申请公布日期 2009.09.30
申请号 SG20090002155 申请日期 2009.01.13
申请人 SILTRONIC AG 发明人 LITE KEVIN;TRAN QUYNH
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