Method and system for verification of microprocessor designs with multiple power gate domains,申请号GB20080020513-传众专利搜索

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发明名称	Method and system for verification of microprocessor designs with multiple power gate domains
摘要
申请公布号	GB2458721(A)	申请公布日期	2009.09.30
申请号	GB20080020513	申请日期	2008.11.10
申请人	INTERNATIONAL BUSINESS MACHINES CORPORATION	发明人	HARRY BAROWSKI;TIM NIGGEMEIER;CHRISTOPH JAESCHKE;JUERGEN WAKUNDA
分类号	G06F17/50;G06F1/32	主分类号	G06F17/50
代理机构		代理人
主权项
地址

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