发明名称 Voltage generation circuit and semiconductor memory using the same
摘要 The voltage generation circuit is disclosed that has a standard voltage generation circuit, a minimum voltage setting circuit, a voltage setting circuit that gradually sets voltage by switching a plurality of the gate transistors to switch a combination of the resistive elements, a differential amplifier that has one input terminal connected to the reference voltage generated by the standard voltage generation circuit, another input terminal connected to the minimum voltage setting circuit and the voltage setting circuit having resistive elements and gate transistors connected to the resistive elements, and the output node showing the result of the difference voltage of these inputs, a pump control circuit that outputs a control signal controlling a charge-pump motion, based on the differential voltage, and a charge pump circuit that sets up and outputs the voltage by the control signal.
申请公布号 US7595684(B2) 申请公布日期 2009.09.29
申请号 US20070685382 申请日期 2007.03.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MAEJIMA HIROSHI
分类号 G05F1/10 主分类号 G05F1/10
代理机构 代理人
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