| 摘要 |
A data conversion circuit for a semiconductor memory apparatus includes a data conversion unit that has a plurality of latches for storing input data and outputting stored data as output data in response to a clock, and an operation mode selection unit that selects either a first operation mode to convert serial data to parallel data during a write operation or a second operation mode to convert parallel data to serial data during a read operation, to thereby drive the data conversion unit.
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