发明名称 TIME-TO-DIGITAL CONVERTER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To actualize a TDC (time-to-digital converter) circuit of a small circuit size and high resolution. SOLUTION: The time-to-digital converter circuit detects a phase of a signal to be measured SC for a reference clock CLK, and is provided with: a first delay line connecting in series a plurality of a first delay elements 21 with a first delay quantityτ1; a second delay line group which are connected to a plurality of connection nodes of the first delay line or an input node of an initial stage, and connects in series at least one or more second delay elements 22 with a second delay quantityτ2 which is different from the first delay quantity: a plurality of discrimination circuits 23 which determines whether a changing edge of the signal to be measured SC precedes or is delayed to changing edges of the delay clocks output from the first delay elements 21 and the second delay elements 22; and an operation circuit 24 which calculates a phase of the changing edge of the signal to be measured for the reference clock from the discrimination result. A difference of the first delay quantity and the second delay quantityτ1-τ2 is smaller than the first delay quantityτ1 and the second delay quantityτ2. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009218729(A) 申请公布日期 2009.09.24
申请号 JP20080058450 申请日期 2008.03.07
申请人 SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER 发明人 SHIMIZU KAZUYA;KANEDA MASATO;KOBAYASHI HARUO;MATSUURA TATSUJI;YAGI KATSUYOSHI;ABE AKIRA;MASUKO KOICHIRO
分类号 H03M1/50 主分类号 H03M1/50
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