发明名称 THERMALLY-ENHANCED MULTI-HOLE SEMICONDUCTOR PACKAGE
摘要 A thermal-enhanced multi-hole semiconductor package is revealed, primarily comprising a substrate with a plurality of alignment holes, a chip disposed on the substrate, an internal heat sink attached to the chip, and an encapsulant. The internal hear sink has a plurality of alignment bars and a heat dissipation surface. The alignment bars are inserted into the alignment holes, but not fully occupying the alignment holes to provide a plurality of flowing channels therein. The encapsulant completely encapsulates the alignment bars through filling the flowing channels. Therefore, the internal heat sink can be aligned to the substrate and is integrally connected with the chip and the substrate utilizing a small amount of adhesive or without any adhesive to form a composite having high rigidity and strong adhesion.
申请公布号 US2009236732(A1) 申请公布日期 2009.09.24
申请号 US20080051429 申请日期 2008.03.19
申请人 POWERTECH TECHNOLOGY INC. 发明人 YU BING-SHUN;HUNG CHING-WEI
分类号 H01L23/367 主分类号 H01L23/367
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