发明名称 SEMICONDUCTOR MEMORY DEVICE ADJUSTING PREAMBLE OF DQS
摘要 PURPOSE: A semiconductor memory device is provided to fetch the data using a data strobe signal in an operation with a high frequency. CONSTITUTION: A memory cell array stores the data in a writing operation. The memory cell array outputs the data in a reading operation. A mode setting unit sets a read latency and a burst length in response to a code signal applied from the outside in a mode setting operation. A clock frequency sensor(18) outputs a preamble cycle signal by counting the number of external clocks applied from the outside for a period corresponding the delay time of a data output path output the data of the memory cell array to the outside. A latency signal generator is activated prior to the period corresponding to the preamble cycle signal before outputting the data stored in the memory cell array to the outside in a read latency period. The latency signal generator generates the data strobe latency signal which is inactivated after maintaining an activation period as many as the period adding the burst length in the period corresponding to the preamble cycle signal.
申请公布号 KR20090100540(A) 申请公布日期 2009.09.24
申请号 KR20080025785 申请日期 2008.03.20
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, MI JO;YU, HAK SOO;SOHN, HAN GU;JEONG, YONG GWON;WON, MYUNG GYOO
分类号 G11C11/4093;G11C11/4076;G11C11/4096 主分类号 G11C11/4093
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