发明名称 PIPELINE A/D CONVERTER AND DIGITAL CAMERA
摘要 PROBLEM TO BE SOLVED: To provide a pipeline A/D converter which reduces power consumption while suppressing increase in element area. SOLUTION: In each of a plurality of stages, an input analog signal is quantized, so that a digital signal corresponding to each part of bits is generated. A DA conversion portion 20, 21 generate an analog reference signal based on the digital signal, and a remainder operation portion 8 performs addition/subtraction and amplification by a predetermined factor with respect to the input analog signal. Then, the signal thus obtained is supplied to a subsequent stage. The DA conversion portion in the first stage where A/D conversion of a plurality of bits is performed includes primary voltage supply portions 21[2]-21[8] can output a reference voltage at one of a plurality of levels, and an auxiliary voltage supply portion 21[1] can output a reference voltage at an auxiliary level different from the level. The respective voltage supply portions selectively output the reference voltages based on a digital signal generated by an AD conversion portion. Based on a combination of the output reference voltages, the analog reference signal in accordance with the digital signal is generated. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009218694(A) 申请公布日期 2009.09.24
申请号 JP20080057936 申请日期 2008.03.07
申请人 PANASONIC CORP 发明人 KITO TAKAYASU;OGITA SHINICHI
分类号 H03M1/14 主分类号 H03M1/14
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