| 摘要 |
<p>A latch module comprising a sense pair of transistor elements (T1 , T2) coupled together for sensing a differential input signal at input terminals (D, Dn), a level-shift module (T5, T6) for producing a differential output signal at output terminals (Q, Qn), and a regenerative pair of transistor elements (T3, T4) coupled together and with the input pair (T1, T2) for holding the output signal through the level-shift module (T5, T6). The latch module also includes a pair of gate transistor elements (T7, T8) connected in series respectively with the sense pair of transistor elements (T1 , T2) and with the regenerative pair of transistor elements (T3, T4) and responsive to an alternating differential gate signal (CIk, Clk_n) to activate alternately the sense pair during sense periods and the regenerative pair during store periods. A current injector (602) provides asymmetric operation by injecting current (Itune) between at least one of the gate transistors (T7, T8) and the corresponding sense (T1, T2) or regenerative pair (T3, T4) of transistor elements so that the sense periods are of different duration from the store periods. In one embodiment, the current injector (602) injects the current (Itune) to the sense pair of transistor elements (T1, T2) in parallel with the corresponding gate transistor element (T7) so that the sense periods are of greater duration than the store periods. The invention also provides a frequency divider comprising a pair of such latch modules cross-coupled in master-slave configuration.</p> |
