CACHE MEMORY SYSTEM, DATA PROCESSING APPARATUS, AND STORAGE APPARATUS

摘要

A cache memory system includes a plurality of first storage hierarchical units provided individually to a plurality of processors. A second storage hierarchical unit is provided commonly to the plurality of processors. A control unit controls data transfer between the plurality of first storage hierarchical units and the second storage hierarchical unit. Each of the plurality of processors is capable of executing a no-data transfer store command as a store command that does not require data transfer from the second storage hierarchical unit to the corresponding first storage hierarchical unit, and each of the plurality of first storage hierarchical units outputs a transfer-control signal in response to occurrence of a cache miss hit when executing the no-data transfer store command by the corresponding processor.