发明名称 MEMORY SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To provide a memory system for reducing the write-in frequency of a NAND type flash memory using a multi-level memory cell, and for preventing its lifetime from being shortened. <P>SOLUTION: A management information storage part 154 is configured to, when receiving a standby, sleep, or reset signal, select the case of taking the snap-shot again, and shifting it to an instruction state (Fig.12(b)) or the case of not taking the snap-shot again, and shifting it to the instruction state (Fig.12(a)). <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009211196(A) 申请公布日期 2009.09.17
申请号 JP20080051340 申请日期 2008.02.29
申请人 TOSHIBA CORP 发明人 YANO JUNJI;MATSUZAKI HIDENORI;HATSUDA KOSUKE
分类号 G06F12/16;G06F3/06;G11C16/02 主分类号 G06F12/16
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