发明名称 LOGIC CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a logic circuit device capable of a plurality of times of different logic operations within one clock cycle. SOLUTION: The reconstructible logic circuit device includes a plurality of logic blocks whose logic constructions can be dynamically reconstructed and a network which connects the plurality of logic blocks so as to dynamically reconstruct them. At least one of the plurality of logic clocks includes a basic logic operation element that receives a first data signal and a first validity instruction signal which is asserted when the first data signal is valid as inputs to generate a second data signal formed by a first logic operation having the first data signal as the input and a second validity instruction signal which is asserted when the second data signal is valid as outputs, and sets the second data signal to an asserted state in response to the asserted state of the first validity instruction signal. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009213054(A) 申请公布日期 2009.09.17
申请号 JP20080056435 申请日期 2008.03.06
申请人 FUJITSU MICROELECTRONICS LTD 发明人 OGAWA TOSHIO
分类号 H03K19/177 主分类号 H03K19/177
代理机构 代理人
主权项
地址