发明名称 FERROELECTRIC MEMORY AND METHOD FOR TESTING THE SAME
摘要 A driver circuit and a precharge circuit apply, in a test mode, a fixed potential to a bit-line, while applying a second plate-line voltage to a plate-line. Then, the bit-line is switched from a first bit-line precharge potential to a floating state, and the plate-line voltage is raised from the second plate-line voltage to a plate-line voltage.
申请公布号 US2009231903(A1) 申请公布日期 2009.09.17
申请号 US20090404157 申请日期 2009.03.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OGIWARA RYU;TAKASHIMA DAISABURO
分类号 G11C11/22;G11C7/00;G11C8/08;G11C11/24;G11C29/00 主分类号 G11C11/22
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