| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To miniaturize a capacitive element built-in multilayer circuit board and reduce inductance thereof. <P>SOLUTION: The capacitive element built-in multilayer circuit board 11 includes: a multilayer circuit board having a plurality of insulating layers 6 composed of resin and conductors 8 formed in the layers 6; and a capacitive element 5 comprising a laminate where a number of electrode layers 1 and ceramic dielectric layers 2 are alternately laminated, and a lead out electrode section 4 having projections projected from the principal plane of the lamination. A method for manufacturing the capacitive element includes a step of forming the insulating layers 6 by curing a precursor sheets while stacking the precursor sheets on the top and bottom of the capacitive element 5 and heating and pressing them, and thereafter electrically conducting the projections of the lead out electrode section 4 to the conductor 8. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
