| 摘要 |
PROBLEM TO BE SOLVED: To provide an MRAM to reduce variations of reference current in a normal mode and to accurately determine a defective bit. SOLUTION: A memory cell MC selected from among a plurality of memory cells MC according to an address signal is connected to, for example in a test mode, one of complementary input nodes of a sense amplifier SA via an n-type MOSFET 10a for controlling a read voltage whose gate terminal is applied with a voltage VCLMP. Under the control of the controller 12, a reference voltage terminal (VSS) is connected to the other one of the complementary input nodes of the sense amplifier SA via an n-type MOSFET 10b for controlling a reference voltage, whose gate terminal is applied with a voltage VREF, and via a switch circuit 11. COPYRIGHT: (C)2009,JPO&INPIT
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