发明名称 POWER SUPPLY NOISE ANALYSIS METHOD, APPARATUS AND PROGRAM FOR ELECTRONIC CIRCUIT BOARD
摘要 Disclosed is a method including: calculating power supply input impedance of the LSI from the number of output buffers of the LSI, output impedance of an output buffer, signal characteristic impedance and characteristic impedance of power supply/ground of an LSI terminal, a package, and a chip terminal part, characteristic impedance of wiring connected to an LSI output terminal, and output signal damping resistance calculating a reflected voltage of power supply noise at a semiconductor device mounted on an electronic circuit board, based on impedance characteristic between a power supply and ground of the semiconductor device; and analyzing power supply noise of the electronic circuit board, based on the reflected voltage of the power supply noise at the semiconductor device.
申请公布号 US2009234602(A1) 申请公布日期 2009.09.17
申请号 US20090401065 申请日期 2009.03.10
申请人 KASHIWAKURA KAZUHIRO 发明人 KASHIWAKURA KAZUHIRO
分类号 G06F19/00;G01R27/00;G01R29/26;G06F17/50;H05K3/00 主分类号 G06F19/00
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