发明名称 MEMORY CONTROL CIRCUIT, MEMORY CONTROL METHOD, AND INTEGRATED CIRCUIT
摘要 Each of a plurality of memories includes a terminating resistor for preventing signal reflection, and a memory control circuit includes an ODT control circuit for driving the terminating resistor of each memory, and a selector for selecting, from memories except for a memory to be accessed, at least one memory for which driving of the terminating resistor is to be suppressed, in accordance with the memory to be accessed.
申请公布号 US2009230989(A1) 申请公布日期 2009.09.17
申请号 US20070441139 申请日期 2007.10.15
申请人 CANON KABUSHIKI KAISHA 发明人 MURAYAMA KOHEI;SUZUKI TAKESHI
分类号 H03K17/16;G06F12/00;H03K19/003 主分类号 H03K17/16
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