| 摘要 |
<p>In a packet processing device capable of reducing power consumption when time interval, between input packets is increased and an input traffic capacity is reduced, packet processors, N in number (N is an integer of one or more), sequentially perform processing in response to an input packet to output a processed packet and processor packet detectors detect whether or not a packet exists in the packet processors. Responsive to a result of the processor packet detectors, a power supply switch unit controls power supply to the packet processors. Thus, each of the packet processors is intermittently put into an active state by intermittent power supply.</p> |
