| 摘要 |
<p>A phase change memory device and a layout method thereof are provided to maintain dummy cells into a turn off state by supplying a voltage more than an activation voltage level of a bit line to a dummy active region in which dummy cells are formed. A first active region is connected to each global word line(GWL0~GWL7). Phase change memory cells(23) are formed between bit lines(BL0~BL7). A plurality of memory cell strings(22) performs a phase change of the memory cell when a second voltage of a level lower than a first voltage level is supplied. A dummy cell string(24) includes a plurality of dummy cells having the same phase change structure as the memory cells and a second active region. Each memory cell includes a switching device and a phase change resistor connected between the bit line and the first active region. A plurality of dummy cells includes a dummy switching device and a dummy phase change resistor.</p> |
