| 摘要 |
A divider and a dividing method of the same performing a stable operation in which circuit blocks are stable are provided to reduce power consumption without operating a second divider. An input unit(310) inputs divider standard value based on the division value valid signal. A controller supplies the divider efficient signal based on a first count value counting a first edge of the source clock signal. A first divider(350) produces the first clock signal based on the first count value. A second divider(370) generates the second clock signal based on the second count value and supplies the second count value by counting the second edge of the source clock signal. An output unit(390) outputs the divided clock signal based on the first clock signal and the second clock signal. |
