发明名称 |
STACKED 1T-n MEMORY CELL STRUCTURE |
摘要 |
This invention relates to memory technology and new variations on memory array architecture to incorporate certain advantages from both cross-point and 1T-1Cell architectures. The fast read-time and higher signal-to-noise ratio of the 1T-1Cell architecture and the higher packing density of the cross-point architecture are both exploited by combining certain characteristics of these layouts. A single access transistor 16 is used to read multiple memory cells, which can be stacked vertically above one another in a plurality of memory array layers arranged in a "Z" axis direction. |
申请公布号 |
EP1634333(B1) |
申请公布日期 |
2009.09.16 |
申请号 |
EP20040785544 |
申请日期 |
2004.05.13 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
NEJAD, HASAN;SEYYEDY, MIRMAJID |
分类号 |
H01L27/22;G11C11/15;G11C11/16;H01L21/8246 |
主分类号 |
H01L27/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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