发明名称 |
Semiconductor memory devices having variable additive latency |
摘要 |
A semiconductor memory device includes an additive latency setting unit configured to receive a mode setting code from an external unit in response to the mode setting signal during a mode setting operation, set an additive latency value in response to the mode setting code, and receive the mode setting code in response to the additive latency setting signal during a normal operation, and an additive latency changing unit configured to change the additive latency value in response to the mode setting code during the normal operation.
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申请公布号 |
US7590013(B2) |
申请公布日期 |
2009.09.15 |
申请号 |
US20070711647 |
申请日期 |
2007.02.28 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
YU SO-YOUNG;LEE JAE-KYUNG |
分类号 |
G11C11/063 |
主分类号 |
G11C11/063 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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