发明名称 Standard cells, LSI with the standard cells and layout design method for the standard cells
摘要 In automatic placing and routing, a standard cell 101 is composed of a P-channel transistor region 102 and an N-channel transistor region 103. The P-channel transistor region 102 has a P-channel functional transistor forming region 104, and the N-channel transistor region 103 has an N-channel functional transistor forming region 105. In a space region of the N-channel transistor region 103 other than the N-channel functional transistor forming region 105, a power source capacitor forming region 106 is formed at a portion of the P-channel transistor region 102 opposing the P-channel functional transistor forming region 104. In this region, a power source capacitor is formed to suppress the IR-Drop of a power source wiring line.
申请公布号 US7589361(B2) 申请公布日期 2009.09.15
申请号 US20050224042 申请日期 2005.09.13
申请人 PANASONIC CORPORATION 发明人 TAKAHATA ATSUSHI
分类号 H01L27/10 主分类号 H01L27/10
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