发明名称 Variable loop bandwidth phase locked loop
摘要 An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to generate an output signal oscillating at a first frequency in response to a control signal. The charge pump circuit may be configured to generate a first component of the control signal in response to a first adjustment signal and a second adjustment signal. The second charge pump may be configured to generate a second component of the control signal in response to a first intermediate signal and a second intermediate signal. The switch circuit may be configured to generate the first intermediate signal and the second intermediate signal in response to the first adjustment signal and the second adjustment signal. The comparator circuit may be configured to generate the first and second adjustment signals in response to a comparison between (i) an input signal having a second frequency and (ii) the output signal.
申请公布号 US7589594(B2) 申请公布日期 2009.09.15
申请号 US20050260442 申请日期 2005.10.27
申请人 LSI CORPORATION 发明人 LIU CHUNBO
分类号 H03L7/00 主分类号 H03L7/00
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