发明名称 Semiconductor memory device
摘要 A storage node voltage control circuit is added to a memory cell including two load transistors, two drive transistors and two access transistors. The storage node voltage control circuit performs control so that in writing data into the memory cell, a voltage at one of the two storage nodes holding a low logic level is raised without changing voltages at respective sources of the load transistors.
申请公布号 US7589991(B2) 申请公布日期 2009.09.15
申请号 US20070826246 申请日期 2007.07.13
申请人 PANASONIC CORPORATION 发明人 MASUO AKIRA
分类号 G11C7/00 主分类号 G11C7/00
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