发明名称 SEMICONDUCTOR DEVUCE AND MANUFACTURING METHOD THEREOF
摘要 <p>A structure for reducing resistance of a source, a drain and a gate, and a manufacturing method of an SGT in which a desired length of the gate, shapes of the source and drain, and diameter of a column-like semiconductor layer are provided. The manufacturing method of a semiconductor device comprises a step of forming a first column-like conductive type semiconductor layer, a step of forming a second conductive type semiconductor layer at a lower part of the first column-like conductivity type semiconductor layer, a step of forming a gate insulating film and a gate electrode around the first column-like conductive type semiconductor layer, astep of forming an insulating film on the upper part of the gate and also on the side wall of the first column-like conductive type semiconductor layer, a step of forming an insulating layer on the side wall of the gate, a step of forming the second conductive type semiconductor layer on the upper part of the first column-like conductive type semiconductor layer, and a step of forming a compound of metal and semiconductor in the gate and the second conductive type semiconductor layer formed on the upper and lower parts of the first column-like conductive type semiconductor layer.</p>
申请公布号 WO2009110048(A1) 申请公布日期 2009.09.11
申请号 WO2008JP52564 申请日期 2008.02.15
申请人 UNISANTIS ELECTRONICS (JAPAN) LTD.;MASUOKA, FUJIO;ARAI, SHINTARO;NAKAMURA, HIROKI;KUDO, TOMOHIKO 发明人 MASUOKA, FUJIO;ARAI, SHINTARO;NAKAMURA, HIROKI;KUDO, TOMOHIKO
分类号 H01L29/786;H01L21/28;H01L21/336 主分类号 H01L29/786
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