POWER AMPLIFICATION CIRCUIT AND WIRELESS COMMUNICATION CIRCUIT

摘要

PROBLEM TO BE SOLVED: To achieve a power amplification circuit which achieves a high output while avoiding an entire wireless communication circuit from increasing its power voltage and also avoiding deterioration of its performance as the power amplification circuit. SOLUTION: The power amplification circuit comprises: an FET 1 having a gate electrode connected with a signal input terminal; and an FET 2 having a gate electrode connected with an input of an ON/OFF control signal, a source electrode being connected in cascade with a drain electrode of the FET 1, and a drain electrode being connected with a signal output terminal. The power amplification circuit amplifies a signal applied to the signal input terminal and outputs the amplified signal from the signal output terminal. A breakdown voltage between the drain and the source of the FET 2 is set to be higher than that of the FET 1. COPYRIGHT: (C)2009,JPO&INPIT