| 摘要 |
PROBLEM TO BE SOLVED: To provide a configuration capable of implementing a voltage application test and to protect voltage between gates and sources of FETs from overvoltage, in a semiconductor integrated circuit including a plurality of FETs of the same conductive type connected in series in a load electrification route. SOLUTION: In a wafer check step, electrodes 9, 10, 11 are set to a ground level and a test voltage is applied to an electrode 8, thereby applying a test voltage higher than that in normal operation to gate oxide films of MOSFETs Q1, Q2. Since reverse withstand-voltage of a diode 20 is higher than the test voltage, the diode is not electrified. When a gate signal Sd becomes an L level in an actual operating state, both the MOSFETs Q1, Q2 are turned off. When a source potential (a potential of the electrode 10) becomes higher than the gate potential of the MOSFET Q2 by Vf or more, the diode 20 is electrified, and a voltage between the gate and the source of the MOSFET Q2 is limited to Vf or lower. COPYRIGHT: (C)2009,JPO&INPIT
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