| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a microcomputer properly processing an unmaskable interrupt request at the time of occurrence of the unmaskable interrupt request when the unmaskable interrupt request occurs to a CPU when skip processing is configured such that the skip processing is executable. <P>SOLUTION: The CPU 10 of an evaluation chip 1 sets a skip state flag to a storage area 22a when starting execution of a skip instruction, writing of data is forbidden during all that time, the skip state flag is evacuated to an evacuation circuit 55 when an NMI occurs during execution of the skip instruction, NMI processing is started after resetting the skip state flag of the storage area 22a, and the skip state flag read from the evacuation circuit 55 is set to the storage area 22a to continue the execution of the skip instruction when interrupt processing is ended. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
