| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a clock regeneration circuit capable of raising the accuracy of phase adjustment of a clock signal. <P>SOLUTION: An edge extraction circuit 8 detects transition points of an input signal. An AND gate block 9 and the number of edges counter block 10 associate partial periods being generated by dividing a reference period of the clock signal into a plurality of periods with the transition points, and generates a first histogram indicating a frequency of the transition points for each of the partial periods. a histogram calculation circuit 11 generates a second histogram by performing calculation processing based on the first histogram, and calculates a phase adjustment value of the clock signal based on the second histogram. A clock phase adjustment circuit 12 adjusts a phase of the clock signal based on the phase adjustment value. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
