发明名称 |
System and method for reducing etch sequencing induced downstream dielectric defects in high volume semiconducting manufacturing |
摘要 |
A system and method is disclosed for reducing etch sequencing induced downstream dielectric defects produced in a SOG planarization process used in high volume semiconductor manufacturing. Three factors have been identified as causes of the defects. The three factors are: (1) phosphorus-doping in the base dielectric, and (2) using for SOG etchback an etch tool that was last used for a bond pad etch process, and (3) residual metal contaminants in the etch chamber used for the SOG etchback. Elimination of any one of these three factors eliminates the defects.
|
申请公布号 |
US7585784(B1) |
申请公布日期 |
2009.09.08 |
申请号 |
US20040869645 |
申请日期 |
2004.06.16 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
DESHMUKH ABHAY RAMRAO;DOAD SATNAM SINGH |
分类号 |
H01L21/31;H01L21/469 |
主分类号 |
H01L21/31 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|