发明名称 Instruction for conditionally yielding to a ready thread based on priority criteria
摘要 An integrated circuit (10) has a conditional yield instruction (305) which may be used to conditionally yield execution of a currently active thread based on priority and status of other threads. In one embodiment, an I bit 304 may be used to designate whether the priority selection bits (50) are stored in the instruction itself. If the priority selection bits (50) are not stored in the instruction itself, a portion of the instruction (302) may be used to store a location indicator which indicates where the priority selection bits (50) are located (e.g. register file 22).
申请公布号 US7584344(B2) 申请公布日期 2009.09.01
申请号 US20060381284 申请日期 2006.05.02
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 MOYER WILLIAM C.;WHISENHUNT GARY L.
分类号 G06F9/40 主分类号 G06F9/40
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