| 摘要 |
In a method of fabricating a flash memory device, an interlayer dielectric layer is formed on a semiconductor substrate. The interlayer dielectric layer is etched to form first contact holes through which junction regions of a cell region are exposed. First contact plugs are formed within the first contact holes. A top surface of the interlayer dielectric layer is etched so that portions of the first contact plugs having the largest width are exposed. The interlayer dielectric layer is etched to form a second contact hole through which a junction region of a peri region is exposed. A second metal layer is formed over the first contact plugs and the interlayer dielectric layer so that the second contact hole is gap-filled. A second contact plug is formed within the second contact hole by removing the second metal layer and the exposed portions of the first contact plugs on the interlayer dielectric layer.
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