发明名称 CIRCUIT DESIGN SUPPORT PROGRAM, CIRCUIT DESIGN SUPPORT METHOD, AND CIRCUIT DESIGN SUPPORT DEVICE
摘要 PROBLEM TO BE SOLVED: To significantly reduce the time required for circuit design. SOLUTION: Circuit information is generated, which is composed including input/output relations between operation circuits from the output side to the input side of the overall electronic circuit, and information on the processing time by operation circuits. The generated circuit information is traced from the output side to the input side, and the delay time generated on the path connecting the operation circuits is calculated. A circuit of the four basic operations of arithmetic in which a plurality of circuits of four basic operations of different kinds are arranged on the output side are retrieved, and a delay circuit for synchronization to the maximum delay time is created between the retrieved operation circuit and each of the operation circuits other than the operation circuits on the path where the maximum delay time occurs among the operation circuits arranged on the output side of the retrieved circuit of four operations. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009193452(A) 申请公布日期 2009.08.27
申请号 JP20080034902 申请日期 2008.02.15
申请人 FUJITSU LTD 发明人 ITO YASUYOSHI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址
您可能感兴趣的专利