| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a test quality evaluation device of a semiconductor integrated circuit for achieving improvement of test quality. <P>SOLUTION: The test quality evaluation device 100 of the semiconductor integrated circuit includes: a failure-layout information link part for preparing a weighing failure dictionary by allowing a layout element relating to non-detection failure to correspond to the non-detection failure not detected by a test pattern as weighing of the non-detection failure; a test quality index calculating part for outputting an obtained product as an inferiority remaining rate due to the test pattern by multiplying weighing of the non-detection failure, an inferior mode-failure model corresponding factor, and an inferiority generation rate of a layout element unit; a determining part for determining whether the inferiority remaining rate is a target value or less; and a test point insertion part for inserting a test point for preferentially detecting the non-detection failure of large weighing in a logic net of a test object circuit based on the weighing failure dictionary when the inferiority remaining rate is determined to be higher than the target value with the determination part. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
