发明名称 WIRING LAYOUT DEVICE, WIRING LAYOUT METHOD, AND WIRING LAYOUT PROGRAM
摘要 PROBLEM TO BE SOLVED: To solve the problem that the density of wirings can not be enhanced when reducing noise in the conventional layout method. SOLUTION: This wiring layout device has: an information storage part 20; an actual wiring track setting part 11 which sets actual wiring tracks; an element arrangement part 12 which arranges circuit elements; a virtual wiring track setting part 13 which sets a virtual wiring track between the adjacent actual wiring tracks; a terminal arrangement change part 14 which moves an element of the circuit element connected to first wiring onto the adjacent virtual wiring track; a wiring part 16 which connects terminals on the actual wiring tracks with second wiring along the actual wiring tracks, and connects the terminals on the virtual wiring track with the first wiring along the virtual wiring track; an adjacent wiring section length calculation part 18 which calculates the length of the adjacent section in which the first wiring and the second wiring are adjacently arranged; and a wiring shape change part 19 which moves one-side adjacent prohibition wiring onto the actual wiring track on the side that the length of the adjacent section becomes short. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009193517(A) 申请公布日期 2009.08.27
申请号 JP20080036149 申请日期 2008.02.18
申请人 NEC CORP 发明人 TAWADA SHIGEYOSHI
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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