| 摘要 |
PROBLEM TO BE SOLVED: To improve a manufacturing yield by reducing an influence of damages by over-etching when forming an opening via a dual stress liner. SOLUTION: On a substrate 100, an NFET101, a PFET103, and a wiring 102 are formed. A tensile stress inducing layer 105 is formed on all over the face. Etching is performed so as to the tensile stress inducing layer 105 remains on the NFET 101. A compressive stress inducing layer 301 is formed on all over the face. The thickness of the compressive stress inducing layer 301 on the PFET 103 and the wiring 102 is partly reduced. An insulation film 502 is formed on all over the face. The insulation film 502, tensile stress inducing layer 105, and compressive stress inducing layer 301 are etched. Openings 501 leading to the NFET101, PFET103, and wiring 102 are formed. COPYRIGHT: (C)2009,JPO&INPIT
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