发明名称 |
MICROARCHITECTURE, METHOD AND COMPUTER PROGRAM PRODUCT FOR EFFICIENT DATA GATHERING FROM A SET OF TRACE ARRAYS |
摘要 |
An architecture for collecting performance data in a processor, that includes: a trace read control unit and a trace data collect unit, each unit coupled to a plurality of trace array and multiplex units for providing performance data, the coupling accomplished by a trace read control bus, a data select bus, a trace row address bus and a data return bus; wherein each of the trace array and multiplex units receives a trace read signal and provides data including trace data and the trace read signal to the trace data collect unit. A method and a computer program product are provided.
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申请公布号 |
US2009217012(A1) |
申请公布日期 |
2009.08.27 |
申请号 |
US20080036540 |
申请日期 |
2008.02.25 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
WEST, JR. PATRICK M.;BARTIK JANE H.;RECKTENWALD MARTIN;SHUM CHUNG-LUNG K.;SWANEY SCOTT B. |
分类号 |
G06F9/22 |
主分类号 |
G06F9/22 |
代理机构 |
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代理人 |
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地址 |
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