发明名称 MULTIPLE LEVEL CELL MEMORY DEVICE WITH IMPROVED RELIABILITY
摘要 The reliability of multiple level cells in a memory device should be increased by programming the ends of the series strings of memory cells differently than the remaining quantity of memory cells of the series string. The end cells closest to select gate source and select gate drain transistors can be programmed as single level cells while the remaining cells of the string are programmed as multiple level cells. Another embodiment can program only one or more cells at the source end of the series string as single level cells. Still another embodiment can skip programming of the cells at either only the source end or both the source end and the drain end of the series string.
申请公布号 WO2009085663(A3) 申请公布日期 2009.08.27
申请号 WO2008US86597 申请日期 2008.12.12
申请人 MICRON TECHNOLOGY, INC.;TANAKA, TOMOHARU 发明人 TANAKA, TOMOHARU
分类号 G11C16/10;G11C16/04;G11C16/12 主分类号 G11C16/10
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