AN ASIP ARCHITECTURE FOR DECODING AT LEAST TWO DECODING METHODS

摘要

The present invention provides a system for execution of a decoding method, the system being capable of executing at least two data decoding methods which are different in underlying coding principle, whereby at least one of said data decoding methods requires data shuffling operations on said data. A system according to embodiments of the present invention comprises: - at least one application specific processor having an instruction set comprising arithmetic operators excluding multiplication, division and power, the processor being selected for execution of approximations of each of said at least two data decoding methods, - at least a first memory unit, e.g. background memory, for storing data, - a transfer means for transferring data from the first memory unit towards said at least one programmable processor, said transfer means including a data shuffler, and - a controller for controlling the data shuffler independent from the processor.