发明名称 SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To provide a technology capable of preventing a chip crack in a wire bonding process to increase a manufacturing yield in a semiconductor apparatus in which a plurality of semiconductor chips are laminated in multiple stages. <P>SOLUTION: A dummy bump 16 is formed on a non-connected pad electrode 10N to which a bonding wire 11 of a lower stage chip 3D is not connected. Thereby, when the bonding wire 11 is connected to a pad electrode 10 of an upper stage chip 3U positioned on the non-connected pad electrode 10N of the lower stage chip 3D, the dummy bump 16 formed on the non-connected pad electrode 10N of the lower stage chip 3D supports the upper stage chip 3U to reduce the deflection of the upper stage chip 3U, and a crack generated in the pad electrode 10 of the upper stage chip 3U can be prevented. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009194189(A) 申请公布日期 2009.08.27
申请号 JP20080034089 申请日期 2008.02.15
申请人 RENESAS TECHNOLOGY CORP 发明人 ARAKI MAKOTO;MIYAZAKI TSUYOSHI;MUTO OSAYASU
分类号 H01L25/065;H01L21/3205;H01L21/56;H01L23/12;H01L23/52;H01L25/07;H01L25/18 主分类号 H01L25/065
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