A CIRCUIT FOR AND METHOD OF MINIMIZING POWER CONSUMPTION IN AN INTEGRATED CIRCUIT DEVICE

摘要

A method of minimizing power consumption in an integrated device is disclosed. The method comprises providing a plurality of circuit blocks having circuits for performing logic functions, wherein each circuit block consumes power in a static state (1202); coupling one of a plurality of operating voltages to each circuit block of the plurality of circuit blocks (1204); enabling a reduction of power consumed by a first set of circuit blocks by way of a first power reduction signal (1206); and enabling a reduction of power consumed by a second set of circuit blocks by way of a second power reduction signal (1208). A circuit (100, 200) for minimizing power consumption in a device is also disclosed.