A method and an apparatus for demodulating a signal are provided to reduce power consumption of a receiver by demodulating an input signal having a high frequency through a demodulator having a simple structure. A phase detecting part(610) detects phase information of an input signal based on a sampling result about the input signal modulated as a carrier wave having a first frequency. A clock generating part(620) generates a clock signal having a demodulation frequency which is synchronized with the input signal by the phase information. A sampling part(630) samples the input signal in response to the generated clock signal. The sampling part samples the input signal in a time in which a rising edge and a falling edge of the clock signal are generated. A demodulating part(640) demodulates the input signal based on a sampling result of the sampling part.
申请公布号
KR20090089099(A)
申请公布日期
2009.08.21
申请号
KR20080014465
申请日期
2008.02.18
申请人
INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY