发明名称 DIGITAL/ANALOG CONVERTER
摘要 PROBLEM TO BE SOLVED: To reduce the layout area of a chip by reducing the number of adjustment fuses to be used for a unit current cell group of a current-cell type DAC. SOLUTION: In a digital/analog converter, a fuse circuit including six fuses 12a-12f for generating current value adjusting control signals Sa-Sf, is provided in a specific reference unit current cell 10R among a plurality of unit current cells in a unit current cell group. Furthermore, each of unit current cells 10A1, 10A2, ..., other than the reference unit current cell 10R, comprises a fuse circuit including three fuses 12g-12i which generate correction signals Sg-Si for correcting the control signals Sa-Sf, respectively. For values of the correction signals Sg-Si, a range may be narrow, in comparison with values of the control signals Sa-Sf that become a reference. Therefore, the total number of fuses in the unit current cell group can be reduced, in comparison with a case where a reference control signal is generated for each of unit current cells. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009188875(A) 申请公布日期 2009.08.20
申请号 JP20080028635 申请日期 2008.02.08
申请人 OKI SEMICONDUCTOR CO LTD 发明人 SASAKI SEIICHIRO
分类号 H03M1/74 主分类号 H03M1/74
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