发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To increase irregularity of one-bit seeds outputted from a random number generating circuit. <P>SOLUTION: The random number generating circuit 50 is provided with an oscillation circuit 11, a smoothing circuit 12 and a genuinizing circuit 13. The oscillation circuit 11 and smoothing circuit 12 are connected by a signal line DL1. A signal line DL11 transmitting a clock signal CLKA is arranged nearby the signal line DL1 on the side of the oscillation circuit 11 of the signal line DL1 only for a period L of predetermined length. The clock signal CLKA transmitted through the nearby-arranged signal line DL11 adds crosstalk noise to an output signal S1 of the oscillation circuit which is transmitted through the signal line DL1, an output signal S1A as random number data which has extremely high randomness viewed in time series is inputted to the smoothing circuit 12, and an output signal S2 smoothed by the smoothing circuit 12 is inputted to the genuinizing circuit 13. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009188186(A) 申请公布日期 2009.08.20
申请号 JP20080026536 申请日期 2008.02.06
申请人 TOSHIBA CORP 发明人 NAKAJIMA SHIGERU
分类号 H01L21/822;G06F7/58;H01L21/82;H01L27/04;H03K3/84 主分类号 H01L21/822
代理机构 代理人
主权项
地址