发明名称 System and Method for Prioritizing Floating-Point Instructions
摘要 The present invention provides a system and method for prioritizing floating-point instructions in a cascaded pipeline. The system includes a cascaded delayed execution pipeline unit having a plurality of execution pipelines that execute instructions in a common issue group in a delayed manner relative to each other. The system further includes circuitry configured to: (1) receive an issue group of instructions; (2) determine if at least one floating-point instruction is in the issue group, if so scheduling the least one floating-point instruction in a one of the plurality of execution pipelines based upon a first prioritization scheme; (3) determine if there is an issue conflict for one of the plurality of execution pipelines; (4) resolve the issue conflict by scheduling one floating-point instruction causing the issue conflict in a different execution pipeline; and (5) schedule execution of the issue group of instructions in the cascaded delayed execution pipeline unit.
申请公布号 US2009210669(A1) 申请公布日期 2009.08.20
申请号 US20080033045 申请日期 2008.02.19
申请人 发明人 LUICK DAVID A.
分类号 G06F9/302 主分类号 G06F9/302
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