发明名称 |
DUTY CYCLE CORRECTION CIRCUIT WITH REDUCED CURRENT CONSUMPTION |
摘要 |
A duty cycle correction circuit includes a signal generating unit including a first signal generating unit coupled to a power supply voltage terminal and configured to output a complementary output signal of an output signal in response to a clock signal, and a second signal generating unit coupled to the power supply voltage terminal and configured to output the output signal in response to a complementary clock signal of the clock signal; a variable resistor unit coupled between the first and second signal generating units configured to vary an amount of current flowing into the signal generating unit according to a duty correction control signal, the duty correction control signal having a voltage level determined based on a voltage level of the output signal; and a current source coupled between the variable resistor unit and a ground voltage terminal configured to supply current to the signal generating unit.
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申请公布号 |
US2009206901(A1) |
申请公布日期 |
2009.08.20 |
申请号 |
US20080333193 |
申请日期 |
2008.12.11 |
申请人 |
HYNIX SEMICONDUCTOR, INC. |
发明人 |
SONG HEE WOONG;KIM YONG JU;HAN SUNG WOO;JANG JAE MIN;KIM HYUNG SOO;LEE JI WANG;PARK CHANG KUN;OH IC SU;CHOI HAE RANG;HWANG TAE JIN |
分类号 |
H03K5/04 |
主分类号 |
H03K5/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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