发明名称 Memory System and Memory Management Method Including the Same
摘要 A booting method of a digital processing having a first processor and a second processor is provided. An interface between the first processor and the outside is stopped. A second processor program code is transmitted to a second memory from a first memory. A second stage loader (SSL) for the first processor is transmitted to a buffer of the second processor from the first memory. A first processor program code is transmitted to the second memory from the first memory under the control of the second processor and an interface between the first processor and the outside is resumed. The first processor program code is downloaded fast into the second memory to decrease booting time of the digital processing system.
申请公布号 US2009210691(A1) 申请公布日期 2009.08.20
申请号 US20090430722 申请日期 2009.04.27
申请人 IM JEON-TAEK;LEE YOUNG-MIN;SOHN HAN-GU;KWON JIN-HYOUNG;BYUN SUNG-JAE;LEE YUN-TAE;HWANG GYOO-CHEOL 发明人 IM JEON-TAEK;LEE YOUNG-MIN;SOHN HAN-GU;KWON JIN-HYOUNG;BYUN SUNG-JAE;LEE YUN-TAE;HWANG GYOO-CHEOL
分类号 G06F15/177 主分类号 G06F15/177
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