| 摘要 |
A data output circuit of a semiconductor memory device and an output method thereof are provided to control a generation timing of a second pulse signal by generating a falling timing of an outer clock. An initializer(100) initializes a latch signal in response to a reset signal. If a reset signal is enabled, the initializer disables the latch signal. A pulse generation controller(500) includes an inverting unit(510), a buffer(520), and a latch unit(530). The inverting unit inverts a first pulse signal. The buffer unit buffers the clock. The latch unit outputs the latch signal in response to the first pulse signal and the clock. The latch signal is enabled at the rising timing of the clock and the first pulse signal and is disabled at the falling timing of the clock. A pulse generating unit(400) outputs the second pulse signal in response to the latch signal. |
